Dynamic voltage scaling

Dynamic voltage scaling is a power management technique in computer architecture, where the voltage in a component is increased or decreased, depending on circumstances. Dynamic voltage scaling to increase voltage is known as overvolting; dynamic voltage scaling to decrease voltage is known as undervolting. Uncertainty in the form of power, particularly in the case of laptops and other mobile devices, where energy is limited, or in rare cases, to increase reliability. Overvolting is done in order to increase computer performance. The term “overvolting” is also used to increase the speed of overclocking.

MOSFET-based digital circuits operate with voltages and circuit nodes to represent logical state. The voltage at these nodes switches between high voltage and low voltage during normal operation when the inputs to a logic gate transition, the transistors making up that gate can toggle the gate’s output. At each node in a circuit is a certain amount of capacitance. Capacitance can be thought of as a measure of how to make a voltage change. The capacitance arises from various sources, mainly transistors (mainly gate capacitance and diffusion capacitance) and wires (coupling capacitance). Toggling a voltage at a circuit node requires charging or discharging the capacitance at that node; since it is dependent on voltage, the time it takes depends on the applied voltage.

Many modern components allow voltage regulation to be controlled through software (for example, through the BIOS). It is usually possible to control CPU, RAM, PCI, and PCI Express (or AGP) port through a PC’s BIOS. However, some components do not allow for control of supply voltages, and hardware is required for overclocking. Video cards and motherboard northbridges are parts of the world. These modifications are known as “voltage mods” in the overclocking community.

Undervolting is reducing the voltage of a component, usually the processor, reducing temperature and cooling requirements, and possibly allowing a fan to be omitted.

The switching power dissipated by a chip using static CMOS gates is C · V 2 · f, where C is the capacitance being switched for clock cycle, V is the supply voltage, and is the switching frequency, so this part of the power consumption decreases quadratically with voltage. The formula is not exact however, as many modern chips are not implemented using 100% CMOS, but also special memory chips, dynamic logic such as domino logic, etc. Moreover, there is also a smaller current (below 90 nanometers) and threshold levels lower. Accordingly, dynamic voltage scaling is widely used as part of strategies to manage switching power consumption. Low voltage modes are used in conjunction with CPUs and DSPs; only when significant computational power is needed. Some devices also support low voltage operational modes. For example, low power MMC and SD cards can run at 1.8 V and more can be used to maintain power by switching to the lower voltage after detecting a card which supports it. of power consumption, chips are often designed so that they can be powered completely off. This is not being viewed as being dynamic voltage scaling, because it is not transparent to software. When sections of chips can be turned off, as for example on TI OMAP3 processors,

The speed at which a digital circuit can switch states – that is, to go from “low” (VSS) to “high” (VDD) or vice versa – is proportional to the voltage differential in that circuit. Reducing the voltage means that circuits switch slower, reducing the maximum frequency at which that circuit can run. This, in turn, reduces the rate of which program is that it is enough CPU-bound. This again highlights why dynamic voltage scaling is usually done with dynamic frequency scaling, at least for CPUs. There are complex tradeoffs to consider, which depend on the particular system, the load presented to it, and power management goals. When might be needed, clocks and voltages might be raised together. Otherwise,

The 167-processor AsAP 2 chip enables you to make extremely fast (on the order of 1-2ns) and locally controlled voltages. Processors connect their local power grid to a higher (VddHi) or lower (VddLow) voltage supply, or can be cut off completely from a grid to dramatically cut leakage power. Another approach uses per-core on-chip switching regulators for dynamic voltage and frequency scaling (DVFS).

Unix system provides a userspace governor, allowing to modify the frequencies (though limited to hardware capabilities).

Dynamic frequency scaling is another power conservation technique that works on the same principles as dynamic voltage scaling. Both dynamic voltage scaling and dynamic frequency scaling can be used to prevent computer system overheating Reducing the voltage supplied by the manufacturer is recommended.

The efficiency of some electrical components, such as voltage regulators, decreases with increasing temperature, so the power used may increase with temperature driving thermal runaway. Increases in voltage or frequency even higher than the CMOS formula indicates, and vice versa.

The primary caveat of overvolting is increased heat: the power dissipated by a circuit increases with the square of the applied voltage. At higher temperatures, transistor performance is adversely affected, and at some threshold, the performance is higher than the potential gains from the higher voltages. Overheating and damage to circuits can occur very quickly when using high voltages. There are also longer-term concerns: various adverse device-level effects such as hot carrier injection and electromigration occur more rapidly at higher voltages, decreasing the lifespan of overvolted components.